Punch-through, channel length reduced to the point where a parasitic current arises from source to drain, is an ever-present threat in FinFET type semiconductor devices. In the past, punch-through stops (PTS) via conventional implant through the fin have been used to combat punch-through. However, a conventional implant has drawbacks, in particular, a lack of impurity containment in the fin, resulting in impurities with a high diffusivity and resulting loss in performance.
Thus, a need continues to exist for a way to further reduce the risk of punch-through as compared to conventional PTS implant.